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The Mixer circuits are diagrammed in Figure Shift DegmVrms Self Test 5 2 d.
Amplitude Flatness If the signal is good, proceed to step s. Full text of ” HP: If the voltages at TP4 are correct and the output amplitude is incorrect, troubleshoot the problem via Service Groups H or J.
Special Functions 60 through 66 display the calibration values correction factors that control output level and dc offset. Code for manufacturer of the part. Save-recall memory includes 10 non-volatile memory locations, for simple and rapid access to frequently used test setups.
Agilent Technologies HP B Manuals
The N number is determined by control circuits in response to front panel or remote programming. Modulation Source Block Diagram. If not correct, check A21U13 and A21U Set the spectrum analyzer as follows to measure the signal at TPll: If any of the above levels is incorrect, check input pins 12 and 13 of A3U10 for the presence of TTL level pulses. Using the disconnected end of the HP-IB cable, connect one pin at a time to pin 24 while watching the display.
This addition takes place every 10 microseconds once for each cycle of the kHZ reference. If the signal at U31 pins 5 and 9 is correct but pins 6 and 8 are always low, it is possible that U32 could be defective. These adjustments are shown in Table We have made no changes to 3325b manual copy. X Drive Ramp Output The output of the multiplier Vq is normally equal to. Level Control and Amplitude Modulation. If still bad, refer to Service Group J. This is the VCO control nanual. These adjustments should be used following repairs or if performance tests indicate a deficiency.
During each scan cycle, the events shown in Figure happen concurrently.
CRlOl can also be responsible for poor harmonic distortion and maual. Connect an oscilloscope to A21TP9. Writes data through the serial isolation path, then reads it back.
HP 3325B Function Generator
AB21, the most significant address signal used, selects between the MFP and all other devices. This test writes to and reads from U10 on the Control assembly. Since the existing phase lock system will not allow 4 – N to be four digits, some additional circuits are needed to make the VCO operate at a frequency of Change the frequency to 5 Hz. The output pulse is derived from the bias pulse issued by the fractional N control 1C. The bias current is controlled by a pulse from the fractional N control 1C.
To produce the maximum triangle output frequency of 10 kHz, for example, the input must be Each block in this figure indicates the cir- cuit board and schematic appropriate to that function. Press Shift, Deg, Self Test, 2, 2 to start the test. While in continuous sweep mode, check for the presence of pulses at the input pins, output pins, and clock pins of A21U14 and A21U Additional information on individual circuits may be found within the service groups.
If the voltage at TP4 is correct but the output amplitude is still incorrect, check the ac voltages on U14 pins 6 and 7. If pin 7 of A21U33 is positive, and the signal at TP9 is always positive, the trouble is probably in the -i- N. Checks processor, address bus, and address decoding. This voltage controls the D. To clean the fan filter, remove the four nuts that secure the filter retainer, remove the filter, flush with soapy water, rinse cleanand air dry.
When a digit is enabled, eight bits of data parallel from the Machine Data Bus are entered in the 8-bit latch by a Write Keyboard Display Data clock signal.
Press the Local key to exit this special test. Basic Block Diagram, Logic Circuits. If the signal at A3J3 is not correct, go to Step b. Performance Test Troubleshooting Guide. Amplitude Flatness 5- It amnual be necessary to find the best compromise between the 2: It has up to dBc harmonic and dBc spurious maunal for precision measurements.
If it is not within this range, troubleshoot the sine wave amplitude control and amplifier gains. Consequently, the V supply is not disabled.